| 摘要 |
PROBLEM TO BE SOLVED: To realize quick operation and power conservation, without the enlarging layout of a semiconductor memory device having a memory cell array of a large capacity. SOLUTION: A plurality of global word lines 20, 21 are disposed in a memory cell of one line of a memory cell array, and each of the global word lines 20, 21 is formed in two wiring layers of upper and lower layers. Thereby, the number of memory cells connected to one global word line can be substantially reduced, without enlarging the memory cell size, thus realizing quick operation of a memory cell and power conservation. |
