Method for diagnosing failures using invariant analysis

摘要

A method for diagnosing failures within an integrated circuit where known diagnostic fault simulators are unable to detect failure mechanisms which do not conform to known failure models. Basic boolean equations are used to describe the internal nodes forming the logic. These equations are then evaluated by way of a good machine simulation to determine which of the equations are (most) true for failing test patterns and (most) false for passing patterns. At the end of the good machine simulation a score is calculated to determine the number of times (or percentage) for which the equation is true for failing patterns and false for passing patterns. The method is particularly effective for finding shorted nets pairs in which the failure mechanism does not fall within known models. The method described is instrumental in greatly reducing the time required for manual analysis of failure mechanisms not conforming to known models.