| 摘要 |
A digital wireless communication device (100) comprises a software-programmable processor (70), a heterogeneous reconfigurable multiprocessing logic circuit (66), and a bus (52) connecting the software-programmable processor (70) and the heterogeneous reconfigurable multiprocessing logic circuit (66). The heterogeneous reconfigurable multiprocessing logic circuit (66) comprises a set of heterogeneous signal processing kernels and a reconfigurable data router interconnecting the heterogeneous signal processing kernels. The software-programmable processor (70) is selected from a group comprising: a digital signal processor (72) and a central processing unit (74). The architecture provides the ability to reconfigure a single product platform for multiple standards, applications, services, and quality-of service, instead of developing multiple hardware platforms to establish the same collective functionality. The architecture also provides the ability to use software programming techniques to reduce product development time and achieve rapid and comprehensive product customization. The invention extends the performance efficiency of microprocessors and digital signal processors via the augmentation of data path and control paths through a reconfigurable co-processing machine. The reconfigurability of the data path optimizes the performance of the data flow in the algorithms implemented on the processor.
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