发明名称 CONTROL OF PRIORITY AND INSTRUCTION RATES ON A MULTITHREADED PROCESSOR
摘要 <p>A method and apparatus for controlling issue rate of instructions for an instruction thread to be executed by a processor is provided. The rate at which instructions are to be executed for an instruction thread are stored (46) and requests are issued (44) to cause instructions to execute in response to the stored rate. The rate at which instruction requests are issued is reduced in response to instruction executions and is increased in the absence of instruction executions. In a multi-threaded processor, instruction rate is controlled by storing the average rate at which each thread should execute instructions (48).</p>
申请公布号 WO2002067116(A2) 申请公布日期 2002.08.29
申请号 GB2002000742 申请日期 2002.02.19
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