| 摘要 |
<p>A clock recovery circuit controls a clock oscillator according to phase error detected from a demodulated signal (IR, QR). The demodulated signal, obtained from a signal transmitted by orthogonal frequency division multiplexing, is divided into consecutive symbols, each symbol having components corresponding to different sub-carrier frequencies. The clock recovery circuit selects (31, 41) predetermined components, such as pilot signal components, transmission and multiplexing configuration control signal components, or auxiliary channel signal components, and computes phase deviations between different pairs of the selected components within each symbol (7, 10, 11, 12). These phase deviations are summed (15) over each symbol to obtain the phase error (PSI), enabling large phase errors to be detected, and enabling phase error to be detected even in the absence of frequency error.</p> |
