| 摘要 |
<p>There is provided a D/A converter that is free from a variation in the voltage width of 1 LSB between more significant bits and less significant bits of data for conversion due to variations in characteristics of resistors, transistors, etc. to thereby ensure a higher conversion accuracy than the conventional D/A converter. The eight more significant bits of 12-bit data for conversion are applied to a decoder 21, while the four less significant bits of the same are applied to a current addition circuit 22. The decoder 21 selects one of FET's F0 to F255 based on the eight more significant bits to cause one of voltages divided by a series circuit formed by resistors r0 to r255 to be applied to an operational amplifier 40. On the other hand, switches 30 to 33 of the current addition circuit 22 are switched, respectively, by the four less significant bits to turn respective FET's 35 to 38 on and off. As a result, currents flowing through turned-on ones of the FET's 35 to 38 are synthesized to flow through the resistor ra so that a voltage is generated across the resistor ra. The operational amplifier 40 synthesizes the two voltages and then outputs the synthesized voltage. An FET 24 and each of the FET's 35 to 38 form a current mirror circuit, whereby the influence of variations in characteristics of the resistors, etc. is eliminated. <IMAGE></p> |
