Data processing apparatus and methods

摘要

A phase lock loop for recovering a bit clock from a signal containing variations in the bit rate includes mans for resetting the frequency of said phase lock loop to a preset value if the loop loses its lock or if adverse conditions are detected. The loop may be reset if the frequency passes a preset limit or if other apparatus responsive to signal quality or signal to noise ratio detects adverse conditions. In one embodiment the signal is also subjected to automatic gain control and to adaptive filtering, and the frequency may be reset if the A.G.C. and/or the adaptive filter coefficients pass preset thresholds.