发明名称 Method of fabricating vias
摘要 The present invention is a method of fabricating interconnects. A semiconductor substrate having a dielectric layer is provided. The dielectric layer has a via opening therein, which exposes the semiconductor substrate. Next, the surfaces of the via opening is covered with a conformal titanium layer formed by a sputtering process. The surface of the conformal titanium layer is covered with an Al-Si-Cu alloy layer formed by a sputtering process at a temperature of about 0° C. to 200° C. Then, the surface of the Al-Si-Cu alloy layer is covered with an Al-Cu alloy layer formed by a sputtering process at a temperature of about 380° C. to 450° C., which Al-Cu alloy layer fills the via opening. The Al-Cu alloy layer, the Al-Si-Cu alloy layer and the wetting layer on the dielectric layer are patterned by photolithography and etching process.
申请公布号 US6440841(B2) 申请公布日期 2002.08.27
申请号 US19990289859 申请日期 1999.04.12
申请人 UNITED MICROELECTRONICS CORP. 发明人 WANG CHEIN-CHENG;CHANG SHIH-CHANH
分类号 H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/768
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