发明名称 |
Signal phase adjustment circuit to set optimum phase |
摘要 |
A signal phase adjustment circuit to set an optimum phase by adjusting the difference in delay times between signal lines even when the distribution of the amount of phase modification that can be received normally is divided into a plurality of continuous regions. The amount of phase modification of the transmitted signal is allowed to fluctuate during one cycle of the operational frequency of the circuit. Determination of whether or not the reception signal during this interval can be received is continued, and the distribution of amount of phase modification that can be normally received is detected. The detected amount of phase modification defines continuous regions, and an optimum phase region is specified by selecting a region having a width of a specified value or more or the region having the greatest width. The optimum amount of sampling phase modification is determined from the upper and lower limit values of this region.
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申请公布号 |
US6441664(B2) |
申请公布日期 |
2002.08.27 |
申请号 |
US20000732718 |
申请日期 |
2000.12.11 |
申请人 |
FUJITSU LIMITED |
发明人 |
TSUIKI JUN;SHIMIZU TOSHIYUKI |
分类号 |
G06F15/163;H03L7/00;H04L7/02;H04L7/033;H04L7/04;H04L25/02;(IPC1-7):H03H11/16 |
主分类号 |
G06F15/163 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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