发明名称 Semiconductor memory device having structure implementing high data transfer rate
摘要 The inventive semiconductor memory device comprises an interface area transmitting/receiving data to/from an external device, an address-system circuit receiving an address signal from the interface area, a memory cell array (subarray), a preamplifier/write driver for writing data received from the interface area in the subarray or outputting data read from the subarray to the interface area, and an internal data bus transmitting write data and read data. The address-system circuit and the preamplifier/write driver are arranged between the interface area and the memory cell array. The internal data bus is arranged in a row direction. The length of a wire connecting each circuit with the interface area can be minimized, and a high data transfer rate is implemented.
申请公布号 US6442078(B1) 申请公布日期 2002.08.27
申请号 US20000661451 申请日期 2000.09.13
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 ARIMOTO KAZUTAMI
分类号 G11C11/409;G11C7/10;G11C7/18;G11C11/401;H01L21/8242;H01L27/108;(IPC1-7):G11C16/04 主分类号 G11C11/409
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