发明名称 |
Method for operating a memory cell configuration having dynamic gain memory cells |
摘要 |
Each memory cell of a cell configuration includes at least one memory transistor. To write first or second information on the memory cell, a gate electrode of the memory transistor is charged such that a first voltage or a second voltage is applied in the memory transistor. A reading voltage is applied in a second source/drain area of the memory transistor to read first information and second information respectively. The first voltage is applied between the second voltage and the reading voltage. The reading voltage is applied between the first voltage less a threshold voltage of the memory transistor and the second voltage less the threshold voltage of the memory transistor.
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申请公布号 |
US6442065(B1) |
申请公布日期 |
2002.08.27 |
申请号 |
US20010935356 |
申请日期 |
2001.08.22 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
HOFMANN FRANZ;KRAUTSCHNEIDER WOLFGANG;SCHLOESSER TILL;WILLER JOSEF |
分类号 |
G11C11/402;G11C11/404;(IPC1-7):G11C11/40 |
主分类号 |
G11C11/402 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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