发明名称 Method and apparatus for providing data to a processor pipeline
摘要 In one method, a processor comprises both a speculative register file to store speculative register values and an architectural register file to store architectural register values. An output of the architectural register file is coupled to an input of the speculative register file to update the speculative register file when a misspeculation is detected.
申请公布号 US6442678(B1) 申请公布日期 2002.08.27
申请号 US19980224412 申请日期 1998.12.31
申请人 INTEL CORPORATION 发明人 ARORA JUDGE K.
分类号 G06F9/30;G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/30
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