| 摘要 |
PROBLEM TO BE SOLVED: To obtain a semiconductor storage device which can reduce a soft error, without making a circuit constitution complex. SOLUTION: An inverter I1 (whose output part is a storage terminal Na) by an NMOS transistor N1 and a PMOS transistor P1 and an inverter I2 (whose output part is a storage terminal Nb) by an NMOS transistor N2 and a PMOS transistor P2 are crossed and connected. An NMOS transistor N3 is connected to the storage terminal Na, and an NMOS transistor N4 is connected to the storage terminal Nb. The NMOS transistors N1, N3, whose electrodes on one side are connected to the storage terminal Na, are formed so as to be divided into a P-well region PW0 and a P-well region PW1. The NMOS transistors N2, N4, whose electrodes on one side are connected to the storage terminal Nb, are formed so as to be divided into the P-well region PW1 and the P-well region PW0. The P-well regions PW0, PW1 are formed on opposite sides, sandwiching an N-well region NW. |
