| 摘要 |
PROBLEM TO BE SOLVED: To provide an SRAM whose yield can be enhanced. SOLUTION: The memory cell of the SRAM has a structure, in which five conductive layers are provided in the upper part of a field. A flip-flop is constituted of two gate-to-gate electrode layers situated in the first-layer conductive layer, two drain-to-drain connection layers situated in the second-layer conductive layer and two drain-to-gate connection layers situated in the third-layer conductive layer. A VSS interconnection 35 connected to sources of drive transistors Q3, Q4 is arranged in the fourth-layer conductive layer. A bit line 61a and the inverse of a bit line 61b are arranged in the fifth-layer conductive layer. |
