发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent enlargement of a wiring area, when the number of computing elements of a processor is increased, and improve operation stability and performance of the processor by reducing crosstalks. SOLUTION: Arrangement is performed in the relation where a main propagating direction of an operand data signal in a register file circuit 10 (generally, the direction coincides with the direction of a bit line for constituting a resistor file) and the main propagating direction of data signal, in the course of operation processing in fixed-point computing element circuits 20, 21 and floating-pint computing element circuits 30, 31 intersect orthogonally with each other. All of the computing element circuits 20, 21, 30 and 31 are arranged on one straight line, in such a manner that bit slice pitches are made identical and bit positions coincide with each other. A wiring for transmitting an inputted operand data signal and a wiring for transmitting an outputted operand data signal are made to be arranged alternately, and crosstalk is reduced.
申请公布号 JP2002237571(A) 申请公布日期 2002.08.23
申请号 JP20010031806 申请日期 2001.02.08
申请人 NEC CORP 发明人 NAKAZATO SATOSHI
分类号 H01L21/822;H01L21/82;H01L27/04;(IPC1-7):H01L27/04 主分类号 H01L21/822
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