| 摘要 |
A method and apparatus for substantially reducing the need for capacitive and inductive compensation for signal lines on a flip-chip semiconductor device. A flip-chip semiconductor device is disclosed having signal lines of substantially equal length. At least one ground plane is also disposed on the flip-chip device and separated from the signal lines by a dielectric layer. By using a ground plane and signal lines having substantially equal lengths, impedance caused by electromagnetic and electrostatic coupling is significantly reduced, and impedance from signal line length is balanced such that the loads on each of the signal lines, as viewed by the semiconductor die, are substantially equal. In another embodiment, the flip-chip device includes both signal bumps extending from the signal lines and ground bumps extending from the ground plane, wherein the ground bumps are arranged adjacent the signal bumps.
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