| 摘要 |
A semiconductor device is provided which minimizes a reduction in the breakdown voltage caused by a metal electrode to which a high voltage is applied. An n- semiconductor layer (3) is formed on a p- semiconductor substrate (1). A p+ impurity region (4) is formed within the n- semiconductor layer (3), extending from the surface of the n- semiconductor layer (3) to the interface of the n- semiconductor layer (3) and the p- semiconductor substrate (1). The p+ impurity region (4) is formed to surround part of the n- semiconductor layer (3) and forms a high-potential island region (101) where a logic circuit (103), an n+ impurity region (5) which is a cathode region of a bootstrap diode (102), and a p+ impurity region (6) which is an anode region are located.
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