发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE: To provide a reference voltage generating method used for read-out operation of a memory cell having amplifying operation and to provide a dummy cell. CONSTITUTION: A memory cell MCn1 is constituted of read-out NMOS transistors QR, write-in transistors QW, and coupling capacitors Cc, and a dummy cell DC1 has such constitution that two memory cells are connected in series. This dummy cell is arranged at the remotest end of each data line with respect to a sense amplifier. Reference voltage is generated by making difference among quantity of current flowing in respective read-out NMOS transistors. Therefore, a DRAM having higher operation speed, higher integration, and lower power consumption compared with a conventional one can be realized.
申请公布号 KR20020067406(A) 申请公布日期 2002.08.22
申请号 KR20010051579 申请日期 2001.08.25
申请人 HITACHI.LTD. 发明人 HANZAWA SATORU;SAKATA TAKESHI
分类号 G11C11/401;G11C7/14;G11C11/405;G11C11/407;G11C11/4099;(IPC1-7):G11C11/407 主分类号 G11C11/401
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