High-frequency switch circuit for digital and analog operations, has impedance element to negate low-parasitic capacitance associated with transfer transistor

摘要

An enable signal node (EN) receives a switch circuit activation signal. A PMOS transfer transistor has source coupled to a node (A) and drain couple to node (B). An impedance element (30) coupled between the node (EN) and gate of the transistor, substantially negate low-parasitic capacitance associated with the transistor. Independent claims are also included for the following: (a) Computing system; (b) Router; (c) Flat panel screen system; (d) Electrical signal transfer regulating process.