发明名称 |
System and method for inserting leakage reduction control in logic circuits |
摘要 |
A method for reducing leakage power of a logic network comprising the steps of: using (observability) don't care information to identify "sleep states" for individual nets; determining based on probabilistic analysis at least one net in which expected power consumption will be reduced by forcing a net to a particular value during at least a portion of a "sleep state"; and forcing the determined net to the determined value determined portion of that "sleep state".
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申请公布号 |
US2002116440(A1) |
申请公布日期 |
2002.08.22 |
申请号 |
US20000750969 |
申请日期 |
2000.12.28 |
申请人 |
COHN JOHN M.;DEAN ALVAR A.;HATHAWAY DAVID J.;VENTRONE SEBASTIAN T. |
发明人 |
COHN JOHN M.;DEAN ALVAR A.;HATHAWAY DAVID J.;VENTRONE SEBASTIAN T. |
分类号 |
G06F17/50;G06F1/32;(IPC1-7):G06F9/00 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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