发明名称 Signalprozessor für Kodierung und Dekodierung
摘要 <p>A signal processor comprises a plurality of processing circuits for carrying out various kinds of processing which differ from one another; a memory circuit provided commonly for respective processing circuits, and a control circuit for carrying out access control between the respective processing circuits and the memory circuit, characterized in that the control circuit carries out address control in different units in accordance with the respective processing circuits. <IMAGE></p>
申请公布号 DE69526025(T2) 申请公布日期 2002.08.22
申请号 DE1995626025T 申请日期 1995.10.26
申请人 CANON K.K., TOKIO/TOKYO 发明人 YAMASHITA, SHINICHI;HARUMA, KAZUHIKO
分类号 H04N7/26;H04N7/50;H04N7/52;(IPC1-7):H04N7/24 主分类号 H04N7/26
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