| 摘要 |
PURPOSE: A method for manufacturing a transistor in a semiconductor device is provided to prevent short of a silicide layer due to stress caused by a nitride layer by shortening the height of a gate spacer compared to the height of a gate electrode. CONSTITUTION: A lightly doped drain region(5a) is formed in a semiconductor substrate(1) having a gate electrode. The first spacer(67) including the first oxide layer(6) and a nitride layer(7), is formed at both sidewalls of the gate electrode. By forming a heavily doped drain region(5b) and annealing, a source/drain region(5) is formed. The height of the first spacer(67) is shorten so as to expose the upper sidewalls of the gate electrode by etch-back. A silicide layer(8) is formed on the gate electrode and the source/drain region(5). The second spacer(9) is formed at both sidewalls of the silicide layer(8) located on the gate electrode.
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