| 摘要 |
An information retrieval system is described comprising a store having a plurality of word locations, each of M bits for receiving and storing an item of digital data, e.g. an operand of N bits greater than M, a store address circuit for addressing simultaneously selective consecutive bits of an operand in two or more adjacent word locations, and a shift circuit for rearranging the bits read from the store into a desired sequence. A ROM is provided for storing a plurality of multiple-bit words, each defining a different end around shift, and the store addressing circuit includes a multiplexing circuit responsive to the aforementioned multiple-bit words to determine the addresses of each bit of two consecutive word locations within the store. In addition, there is included a store enabling circuit for determining selectively which of the bits addressed is to be read out; the store enabling circuit is responsive to the multiple-bit words derived from the ROM for enabling selected bits to be read out from the store. |
