发明名称 Digital satellite broadcasting receiver in which loop bandwidth of PLL circuit is changed at the time of centering
摘要 A digital satellite broadcasting receiver include: a channel selecting circuit having a channel selecting PLL; a carrier recovery circuit receiving an output from the channel selecting circuit and having a carrier recovery PLL; a switching circuit for switching a loop bandwidth of the channel selecting PLL; and a control circuit for controlling the switching circuit such that the loop bandwidth of the channel selecting PLL circuit is made narrower at the time of centering than in a normal receiving state or at a time of channel selection. Instead of temporarily narrowing the loop bandwidth of the channel selecting PLL, the loop bandwidth of the carrier recovery PLL may be temporarily widened. The method of centering within the receiver includes narrowing the loop bandwidth of the channel selecting PLL; changing a synchronizing frequency of the channel selecting PLL so as to minimize the amount of carrier offset obtained from the demodulated signal; and widening the loop bandwidth of the channel selecting PLL.
申请公布号 US6438177(B1) 申请公布日期 2002.08.20
申请号 US19980026978 申请日期 1998.02.20
申请人 SHARP KABUSHIKI KAISHA 发明人 IKEDA HITOSHI
分类号 H03L7/093;H04L27/00;H04L27/22;H04L27/233;(IPC1-7):H04L27/14 主分类号 H03L7/093
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