发明名称 Circuit for bipolar transistor stress and qualification
摘要 A stress-driver circuit for providing a constant voltage (Vce) and a constant current (I=Vin/R) to a bipolar transistor under test. The circuit includes a power source, an op-amp, a FET, and the bipolar transistor. The power source is connected to the bipolar transistor collector. The op-amp has a positive input biased at input voltage (Vin) and a negative input having a feedback loop connected to the bipolar transistor emitter. The op-amp output is connected to the FET gate, the FET drain is connected to the power supply, and the FET source is biased to ground through a first resistor and connected to the base of the bipolar transistor. The second resistor is connected at one end to the bipolar transistor emitter and biased to ground at the other end. An automatic trip circuit may be provided to cut off power to the bipolar transistor if the current at the bipolar transistor collector exceeds a predetermined value. One or more parameter readback circuits may be provided in predetermined areas of the stress-driver circuit, each readback circuit providing a readout of current, voltage, or both.
申请公布号 US6437956(B1) 申请公布日期 2002.08.20
申请号 US20000590993 申请日期 2000.06.09
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 MONTROSE CHARLES J.
分类号 G01R31/26;H03K17/0814;H03K17/785;(IPC1-7):H02H9/00 主分类号 G01R31/26
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