发明名称 Wiring structure of a semiconductor integrated circuit and a method of forming the wiring structure
摘要 A wiring structure for effectively reducing wiring capacitance, and a method of forming the wiring structure is disclosed. An underlying film having a dielectric constant lower than that of silicon oxide is formed on at least side surfaces of the wires of a wiring layer and a low dielectric constant film having an even lower dielectric constant is formed between the wires. Further, the surfaces of the underlying film are positively sloped. Because the low dielectric constants of the underlying film and the low dielectric constant film, wiring capacitance is effectively reduced. Further, the positively sloped surfaces facilitate the filling of narrow spaces between the wires by the low dielectric constant film.
申请公布号 US6437441(B1) 申请公布日期 2002.08.20
申请号 US19980113279 申请日期 1998.07.10
申请人 KAWASAKI MICROELECTRONICS, INC. 发明人 YAMAMOTO HIROSHI
分类号 H01L21/469;H01L21/4763;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L23/48 主分类号 H01L21/469
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