发明名称 CLOCK SUPPLYING DEVICE WITH HOLD-OVER FUNCTION
摘要 PROBLEM TO BE SOLVED: To provide a clock supplying device which can guarantee frequency holding precision in a long hold-over state. SOLUTION: A phase information storage circuit 9 stores/updates digital phase information 801 when hold-over control is not performed, does not update information during hold-over control when an input clock is switched and outputs a storage result as stored digital phase information 901. A best quality phase information storage circuit 10 stores digital phase information when the clock selected in an input selection circuit 5 has the highest quality even after an operation is started and selection input is not cut. A phase information switch circuit 12 selects digital phase information 801 in a regular state, stored digital phase information 901 when the clock is switched and stored best phase information 1001 during long hold-over based on the output hold-over control signal 131 of a control signal generating circuit 13 and transmits it as selected digital phase information 140.
申请公布号 JP2002232407(A) 申请公布日期 2002.08.16
申请号 JP20010024576 申请日期 2001.01.31
申请人 NEC CORP 发明人 MUTO HIDEYUKI
分类号 H03L7/14;H04J3/00;H04J3/06;H04L7/033 主分类号 H03L7/14
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