发明名称 |
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To provide a technique for complementally forming a high breakdown voltage MISFET by forming a deep well having a different conductivity type from that of a substrate, without need to deeply diffuse a dopant introduced into the semiconductor substrate with a high-temperature and long-time treatment. SOLUTION: One principal plane of a p-type semiconductor substrate 1a comprises a region where a first p well 2 of the same conductivity type is formed and a region where an n type epitaxial layer 4 of a different conductivity type is buried. In this configuration, the epitaxial layer in no need of the high-temperature and long time heat treatment is arranged as a deep well and the complementary high breakdown voltage MISFET is formed. Because of this configuration, a semiconductor integrated circuit apparatus having the complementary high breakdown voltage MISFET can be provided without causing warpages and slips of the semiconductor substrate which become more remarkable by the high-temperature and long-time heat treatment in the large diameter semiconductor substrate.
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申请公布号 |
JP2002231823(A) |
申请公布日期 |
2002.08.16 |
申请号 |
JP20010022588 |
申请日期 |
2001.01.31 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
FURUTA KOJI;YAMATANI KAZUFUMI |
分类号 |
H01L27/08;H01L21/8238;H01L27/092;(IPC1-7):H01L21/823 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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