| 摘要 |
PURPOSE:To reduce the number of wirings and achieve the reduction of chip sizes by disposing transmission circuits with a decoder as a center and commonly inputting the outputs of the respective transmission circuits. CONSTITUTION:This IC is provided with counters C1 thru C4 for the second, minute, hour and data, circuits TG1 thru TG4 which transmits the outputs of the counters, a timing circuit 5 which selectively drives transmission circuits TG and a decoder 4 for the outputs of the transmission circuits TG. With the decoder 4 as a center, at least two counters and the transmission circuits TG for said counters C are disposed on the right and left so that outputs of the transmission circuits TG are commonly applied to the input line of the decoder 4. As a result, the two-way wirings to the decoder 4 may be reduced by half and chip sizes may be reduced. |
