发明名称 MULTIPLEXER AND MULTIPLEXING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a multiplexer and multiplexing method for obtaining a multiplexed pattern corresponding to a huge amount of multiplexing information which needs complicated and much arithmetic processing by a simpler constitution. SOLUTION: A stream selecting means 201 selects input signals according to the type of programs and assigns and stores them in input buffers (A1) 202-(C1) 204 and a clock generating means 208 outputs transfer clocks A, B, C according to multiplexing information for transferring to output buffers (A) 205-(C) 207 the bit streams assigned to the input buffers according to the transfer clocks A, B, C. An output control means 210 reads bit streams out of those output buffers reaching a specified quantity and outputs multiplexed bit streams. Such constitution can change a multiplexed pattern of output bit streams by varying the transfer clocks only.</p>
申请公布号 JP2002232378(A) 申请公布日期 2002.08.16
申请号 JP20010030306 申请日期 2001.02.07
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAKURAI NOBUYUKI;NAKAI SEIJI;SUZUKI MIKIO
分类号 H04N19/423;H04J3/00;H04N7/08;H04N7/081;H04N7/24;H04N19/00;(IPC1-7):H04J3/00 主分类号 H04N19/423
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