ESD PROTECTION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

PROBLEM TO BE SOLVED: To provide an ESD protection circuit capable of suppressing an unnecessary current. SOLUTION: A P-channel MOS transistor PT1 is connected between a power line L1 and a power line L2. A P-channel MOS transistor PT2 is connected between the power line L1 and a gate of the P-channel MOS transistor PT1 and a voltage of the power line L2 is applied to the gate. A P-channel MOS transistor PT3 is connected between the gate of the P-channel MOS transistor PT1 and the power line L2 and a voltage of the power line L1 is applied to the gate. Substrates of P-channel MOS transistors PT1-PT3 are connected to the gate of the P-channel MOS transistor PT1. In this ESD protection circuit, all current path between the power line L1 and the power line L2 are shut off in any cases.