发明名称 MOS SEMICONDUCTOR DEVICE
摘要 PURPOSE:To prevent a decrease of temporary capacity and a damage made by a temporary thyrister operation at C-MOS by a method wherein a buried insulation layer is selectively arranged below the areas of source and drain. CONSTITUTION:Buried insulation layers 21, 22 are selectively arranged below the source area 5 and the drain area 6 of MOS transistor area. With this arrangement a base board 12 in MOS transistor area is not separated completely from the base board 11, and a base board electrode may be taken. As a result, it is possible to prevent a twisting in performance of VD-ID (drain) and to get a superior characteristic. The temporary decrease of capacitor may be provided sufficiently by the buried insulation layers 21, 22 and a damage caused by the temporary thyrister operation when C-MOS is constructed may also be prevented.
申请公布号 JPS5662369(A) 申请公布日期 1981.05.28
申请号 JP19790138388 申请日期 1979.10.26
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 HATANO HIROSHI
分类号 H01L29/78;H01L27/08;H01L27/12;H01L29/06;H01L29/786 主分类号 H01L29/78
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