| 摘要 |
<p>Quiet row select circuit for holding unselected word lines or row select lines in a memory array at a predetermined voltage potential. Transistors (34), (35), (36), (37) are used to couple each row select line (R0), (R2), (R3) to the predetermined voltage potential wherein for adjacent row select lines at least one of the adjacent select lines is always coupled to the predetermined voltage when in an unselected state. A transistor (31) or (32) is also used to couple each of the adjacent row select lines together and this transistor is enabled whenever the adjacent row select lines are non-selected so that both row select lines are coupled together to the predetermined voltage level. </p> |
