发明名称 STATIC VOLATILE/NON-VOLATILE RAM CELL
摘要 <p>A volatile/non-volatile RAM cell (400) employing a bistable multivibrator with non-volatile, alterable-threshold capacitors (407, 408) coupled to the output terminals (A, B) thereof to provide backup data storage in a power-down situation. In one embodiment, the non-volatile capacitors each have a non-alterable section (A) and an alterable section (B), the non-alterable section having either a depletion or an enhancement threshold. The V/NV RAM cell employs a pair of field effect transistors (409, 410) of depletion or enhancement type to couple the non-volatile capacitors to the output terminals. These coupling transistors form with the non-volatile capacitors a pair of nodes (C, D). The coupling transistors are biased such that a write voltage signal applied to the gates of the non-volatile capacitors produces a bootstrapped voltage on one of the pair of nodes which is effectively isolated from the output terminals of the cell. </p>
申请公布号 WO1981001483(A1) 申请公布日期 1981.05.28
申请号 US1980001518 申请日期 1980.11.10
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