TAPE INTERCONNECTION SUBSTRATE, FABRICATING METHOD THEREOF AND SEMICONDUCTOR CHIP PACKAGE USING THE SAME

摘要

PURPOSE: A tape interconnection substrate is provided to eliminate a problem caused by an exposed lead, by using a bump formed on a base film while maintaining an inherent advantage of the tape interconnection substrate and a semiconductor chip package using the tape interconnection substrate so that an electrical connection with a semiconductor chip is enabled. CONSTITUTION: A base film(11) of an insulating material has the first surface on which an adhesive layer is formed and the second surface opposite to the first surface. An interconnection pattern(15) is formed on the first surface of the base film. A passivation layer is formed on the first surface to cover the interconnection pattern. A bump(19) is formed on the second surface, penetrating the base film and the adhesive layer and adhered to the interconnection pattern. The bump has a predetermined height from the second surface.