发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To inspect a flip-flop circuit to be operated by the positive phase clock and the negative phase clock by using one scan chain. SOLUTION: This semiconductor circuit is provided with a flip-flop circuit 422 for connecting a scan chain connected to flip-flop circuits 401 and 403 to be operated by the positive phase clock to a scan chain connected to flip-flop circuits 402 and 404 to be operated by the negative phase clock. A dummy data for being set to the flip-flop circuit 422 is included in a test pattern.
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申请公布号 |
JP2002228724(A) |
申请公布日期 |
2002.08.14 |
申请号 |
JP20010028671 |
申请日期 |
2001.02.05 |
申请人 |
ASAHI KASEI MICROSYSTEMS KK |
发明人 |
KAMESHIMA YUJI |
分类号 |
G01R31/28;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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