发明名称 Circuit for maintaining the potential of a node of a MOS dynamic circuit.
摘要 <p>A circuit for maintaining the potential of a node (ND) of a MOS dynamic circuit (1) includes a repetitive charging circuit (4) which comprises a circuit (41, 42, 45) to supply a charging current to the node from a point the potential of which is raised higher than a supply source voltage (Vcc) during a predetermined period by the application of a clock signal (S3) whereby the potential of the node is maintained at a predetermined potential (Vnd) higher than the supply source voltage, without supplying a steady current to the node, until a reset signal (S2) is applied to the MOS dynamic circuit. The circuit comprises a number of MOS field-effect transistors (41, 42) and a MOS capacitor (45), the higher potential point being formed at a connecting point of the electrodes of the MOS field-effect transistors and one electrode of the MOS capacitor.</p>
申请公布号 EP0035408(A2) 申请公布日期 1981.09.09
申请号 EP19810300884 申请日期 1981.03.03
申请人 FUJITSU LIMITED 发明人 NAKANO, TOMIO
分类号 H01L27/04;H01L21/822;H03K5/00;H03K5/02;H03K19/096;H03K23/00;H03K23/52;H03K23/54;(IPC1-7):03K19/096;11C7/00;03K5/02;03K17/687 主分类号 H01L27/04
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