发明名称 IMAGE RECORDING DEVICE
摘要 PROBLEM TO BE SOLVED: To provide an inexpensive pixel clock generating circuit which permits a correct reciprocation record on a photosensitive material in an image recording device of a flat bed scanning type using an oscillation type deflector. SOLUTION: A PLL clock CKp as a original clock generated by the PLL circuit 202 of 8-multiplication which is a delay element is thinned out whenever it becomes a prescribed count value previously set in a correction data memory 206 according to the position of a record beam. The PLL clock CKp after thinned out is divided by a frequency divider circuit 208 having a fixed frequency dividing ratio of 8 to create a pixel clock CKi for recording an image. Thereby, the speed control of the pixel clock CKi can be easily and accurately performed. Furthermore, correction is realized by high resolving power and in a wide range.
申请公布号 JP2002228957(A) 申请公布日期 2002.08.14
申请号 JP20010031032 申请日期 2001.02.07
申请人 FUJI PHOTO FILM CO LTD 发明人 SUGANUMA ATSUSHI
分类号 B41J2/44;G02B26/10;H04N1/113;(IPC1-7):G02B26/10 主分类号 B41J2/44
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