发明名称 A method of forming metal connection elements in integrated circuits
摘要 A conductive seed layer (13) is formed on a wafer (10, 11) and a mask (14) is formed thereon, covering the areas of the integrated circuits and leaving exposed the areas (3) overlying the predetermined scribe lines for the separation of the integrated circuits; a metal is deposited by an electrochemical process on the areas (3) of the seed layer (13) which are left exposed, with the use of the seed layer as the cathode; the mask (14) is then removed and another mask (17) is formed, leaving predetermined areas (18) of the seed layer (13) exposed; a metal is deposited on the predetermined areas (18) by an electrochemical process, with the use of the seed layer as a cathode and, finally, the mask (18) is removed. Connection elements of uniform thickness throughout the substrate are thus produced with the use of a very thin seed layer (13). <IMAGE> <IMAGE> <IMAGE> <IMAGE>
申请公布号 EP1231629(A1) 申请公布日期 2002.08.14
申请号 EP20010830077 申请日期 2001.02.07
申请人 STMICROELECTRONICS S.R.L. 发明人 NAPOLITANO, MARIO
分类号 H01L21/288;H01L21/768 主分类号 H01L21/288
代理机构 代理人
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