Method and apparatus for coupling signals across different clock domains, and memory device and computer system using same

摘要

A coupling circuit for coupling a data signal from a first clock domain defined by a first clock signal to a second clock domain defined by a second clock signal. A phase comparator determines whether the first clock signal leads the second clock signal. If so, the data signal is clocked from the first clock domain at a time after a start signal that is later than if the clock signal does not lead the second clock signal. Alternatively, if the first clock signal leads the second clock signal, the data signal may be clocked to the second clock domain at a time after a start signal that is earlier than if the clock signal does not lead the second clock signal.