| 摘要 |
A bias current source circuit with high power supply rejection. In one embodiment, the present invention is comprised of a bias current source circuit. The bias current source circuit is comprised of a primary current source coupled to a power supply, a secondary current source for biasing the primary current source and also coupled to the power supply, and a gain stage. In the present embodiment, the primary current source includes a first transistor having a first region coupled to a second resistor and a second transistor having a first region coupled to the second resistor. In the present embodiment, the gain stage includes a first input coupled to the second region of the first transistor. The simple gain stage further includes a second input coupled to the second region of the second transistor. The gain stage also includes an output coupled to the first regions of the first and second transistors.
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