| 摘要 |
A semiconductor integrated circuit disclosed herein are characterized in that: (a) each chip is reduced in size by having electrode pads formed in a plurality of rows, the small-size chip being used to form a small ordinary package; (b) frame wires inside the package are used to interconnect electrode pads and electrode bumps in different manners so that chips are furnished in common, whereby a small-size mirror package is formed; (c) frame wires on one side are arranged to pass alternately between contiguous electrode pads and/or between contiguous frame wires on the other side in order to further reduce common chips in size, whereby electrode pads are formed in a larger number of rows; (d) a substrate is sandwiched by the CSPs thus obtained so as to at least double packaging density; and (e) switches or fuses are provided in layered connection wires inside the chip so that after package fabrication, the manner of interconnecting the internal circuits of the chip and the electrode pads thereof may be changed selectively given a mirror signal.
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