| 摘要 |
A semiconductor memory device for distributing load of input and output lines includes: a line pre-charger for pre-charging a global read line composed of a pair of lines to a high level in an initial or steady state, a plurality of memory banks connected to a global write line for storing data provided thereto, each of which includes a memory cell array composed of a number of memory cells coupled to a multiplicity of sense amplifiers and the multiplicity of write drivers, a number of multiplexers for selecting the data from the read line; and a data input multiplexer for providing externally inputted data to the global write line on the write operation.
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