| 摘要 |
PURPOSE: An interface device for multi channel data processing is provided, which enables a DSP(Digital Signal Processor) to read ADC(Analog Digital Converter) data in a high speed. CONSTITUTION: A timing generator(7) generates an ADC clock(ADC_CLKIN) and an ADC synchronous signal(ADC_FSI) and an interrupt signal(IIOF_) by receiving a main clock(MAIN_CLK) and a start signal(START) and a reply signal(CLK_BACK) and an ADC inform signal(ADC_FSO), and performs a data latch enable control. A serial/parallel data converter(8) latches digital serial data(SD00-SD09) of the analog digital converter according to the latch enable control, and converts the latched serial data into parallel data(D0-D15) according to output enable signals(OEN0-OEN9) inputted from the digital signal processor through a decoder. AND gate circuits(9,10) generate a test signal(/OE_TEST) by decoding the output enable signal.
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