| 摘要 |
An activation path simulation equipment and an activation path simulation method in accordance with the present invention divides a transistor circuit into a plurality of blocks with reference to pn junction nodes of the transistors included therein, and activation patterns are determined for each block using the characteristics of each transistor so as to efficiently create activation patterns of the transistor circuit. In this way, the number of activation patterns to be created can be decreased without creating unnecessary activation patterns, therefore the number of times of simulation can be decreased, which means that simulation speed increases.
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