发明名称 |
Semiconductor device having a porous buffer layer for semiconductor device |
摘要 |
In a semiconductor device having a three-layered buffer layer comprising core layer 1 having interconnected foams such as a three-dimensional reticular structure and adhesive layers 2 provided on both sides of the core layer as a stress buffer layer between semiconductor chip 5 and wiring 4 to lessen a thermal stress generated between the semiconductor device and the package substrate, where a thickness ratio of core layer 1 to total buffer layer is at least 0.2, the production process can be simplified by using such a buffer layer, thereby improving the mass production capacity and enhancing the package reliability.
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申请公布号 |
US6433440(B1) |
申请公布日期 |
2002.08.13 |
申请号 |
US19980092138 |
申请日期 |
1998.06.05 |
申请人 |
HITACHI, LTD.;HITACHI CABLE, LTD. |
发明人 |
OGINO MASAHIKO;EGUCHI SHUJI;NAGAI AKIRA;UENO TAKUMI;SEGAWA MASANORI;KOKAKU HIROYOSHI;ISHII TOSHIAKI;ANJOH ICHIRO;NISHIMURA ASAO;MIYAZAKI CHUICHI;MITA MAMORU;OKABE NORIO |
分类号 |
H01L23/12;H01L23/31;H01L23/495;H01L23/498;(IPC1-7):H01L23/48;H01L23/52;H01L29/40 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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