发明名称 |
Check abnormal contact and via holes by electroplating method |
摘要 |
A cathode-anode apparatus is constructed whereby the wafer under test, connected to a conducting wire, forms the cathode terminal and a copper plate, also connected to a conducting wire, forms the anode terminal. The wafer under test and the copper plate are immersed in a CuSO4-H2O solution. A positive dc voltage is applied to the copper plate; the dc current ionizes the CuSO4 solution and forms Cu2+ ions. These Cu2+ ions will diffuse to the wafer surface. Most of the Cu2+ ions will accumulate in and around defective contacts or vias in the semiconductor surface making these defective contacts or vias readily identifiable.
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申请公布号 |
US6433575(B2) |
申请公布日期 |
2002.08.13 |
申请号 |
US20010804387 |
申请日期 |
2001.03.13 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY |
发明人 |
CHOU MING-CHUN;SHU HUAI-JEN |
分类号 |
H01L21/66;(IPC1-7):G01R31/26;G01N27/42;G01N27/00;H01H31/12 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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