发明名称 |
Translating switch circuit with disabling option |
摘要 |
A translation switch is described with a transfer MOS transistor that connects a first node to second node where the first node is referenced to a higher voltage than is the second. A pseudo-rail generator drives the gate of the MOS transistor and provides a p-rail reference voltage lower in voltage to that of the first node. The generator includes a selectively enabled active clamping circuit that clamps the gate of the MOS transfer transistor to the p-rail potential and sinks current from the p-rail when higher voltages appear on the p-rail to thereby maintain the p-rail at a substantially constant potential.
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申请公布号 |
US6433613(B1) |
申请公布日期 |
2002.08.13 |
申请号 |
US20000737977 |
申请日期 |
2000.12.15 |
申请人 |
FAIRCHILD SEMICONDUCTOR CORPORATION |
发明人 |
GOODELL TRENOR;BOOMER JAMES;ROWE BRENT |
分类号 |
H03K19/00;H03K17/16;H03K17/687;H03K19/0185;(IPC1-7):H03K17/687 |
主分类号 |
H03K19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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