发明名称 ADDRESS SETTING SYSTEM
摘要 PURPOSE:To set a device address automatically by providing a coincidence circuit, latch circuit, etc., and allowing a CPU to set optionally the characteristic address of a device arranged in the address area of the CPU. CONSTITUTION:When a device 4 is set to some address, the CPU1 inputs and latches the value of an address set in the latch 5. The output of the circuit 5 is coupled with one input of the coincidence circuit 6, which is coupled at the other terminal with the CPU1 through an address line 7. The CPU1 stores an RAM2 with the value latched in the circuit 5, and accesses the RAM2 and outputs the set value to a fetch line 7 when access to a device 4 is necessary. The circuit 6 activates a control line 9 to the device 4 only when the output of the circuit 5 coincides with the output value of the line 7. Thus, the circuit 6, etc., are provided to set a device address automatically.
申请公布号 JPS59231625(A) 申请公布日期 1984.12.26
申请号 JP19830105031 申请日期 1983.06.14
申请人 CANON KK 发明人 UENO SHIYUUGOROU
分类号 G06F13/14;G06F3/00;G06F9/06 主分类号 G06F13/14
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