发明名称 ELASTIC STORAGE CIRCUIT AND METHOD OF RECEIVING DELAYED SIGNAL
摘要 <p>PROBLEM TO BE SOLVED: To provide an elastic storage circuit which can overcome the problem raised by the conventional elastic storage circuit which absorbs the propagating time lag between a plurality of data caused by a difference in transmission line that the circuit becomes complicated in structure and larger in scale and is increased in power consumption, because the circuit is constituted to have four frame counters and to compare the count values of the counters with each other. SOLUTION: This elastic storage circuit is provided with a clock selector which selects a reading-out clock from among a plurality of clocks corresponding to a plurality of data signals having different propagating time lags with respect to the signals, an arrival detecting circuit for data signal composed of a plurality of flip flops which detect the arrival of the plurality of data signals, and a most delayed data detecting circuit composed of an AND circuit which detects the data signal having the longest propagating time lag. The storage circuit is also provided with a resetting circuit which generates a resetting pulse based on the output of the maximal delayed data detecting circuit and the selected reading-out clock.</p>
申请公布号 JP2002223206(A) 申请公布日期 2002.08.09
申请号 JP20010017548 申请日期 2001.01.25
申请人 NEC CORP 发明人 ARAI SHIGEHIRO
分类号 H04L25/02;H04J3/06;H04L7/00;H04L7/033;(IPC1-7):H04L7/00 主分类号 H04L25/02
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